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A 9.8 Gbps, 6.5 mW forwarded-clock receiver with phase interpolator and equalized current sampler in 65 nm CMOS

Ma, Shunli; Manoj, Sai; Yu, Hao; Ren, Junyan; Weerasekera, Roshan

A 9.8 Gbps, 6.5 mW forwarded-clock receiver with phase interpolator and equalized current sampler in 65 nm CMOS Thumbnail


Authors

Shunli Ma

Sai Manoj

Hao Yu

Junyan Ren



Abstract

© 2015 IEEE. A full-rate energy-efficient forwarded-clock (FC) receiver is demonstrated in this paper. A current sampler with continuous-time equalization is realized with 20 GHz bandwidth in sampling for data recovery. Moreover, a phase interpolator is introduced to generate sampling clock with deskew for data recovery. The testing chip was fabricated in 65 nm CMOS process in area of 0.16 mm2. Measurement shows that the FC receiver can achieve a data-rate up to 9.8 Gbps and power consumption is 6.5 mW.

Citation

Ma, S., Manoj, S., Yu, H., Ren, J., & Weerasekera, R. (2015). A 9.8 Gbps, 6.5 mW forwarded-clock receiver with phase interpolator and equalized current sampler in 65 nm CMOS. In 2015 IEEE MTT-S International Microwave Symposium (1-4). https://doi.org/10.1109/MWSYM.2015.7166838

Conference Name 2015 IEEE MTT-S International Microwave Symposium, IMS 2015
Acceptance Date May 1, 2015
Online Publication Date Jul 27, 2015
Publication Date Jan 1, 2015
Deposit Date Jan 31, 2017
Publicly Available Date Mar 29, 2024
Journal Microwave Symposium (IMS), 2015 IEEE MTT-S International
Print ISSN 0149-645X
Publisher Institute of Electrical and Electronics Engineers
Peer Reviewed Peer Reviewed
Pages 1-4
Book Title 2015 IEEE MTT-S International Microwave Symposium
DOI https://doi.org/10.1109/MWSYM.2015.7166838
Keywords phase interpolator, forwarded-clock receiver, current-sampling
Public URL https://uwe-repository.worktribe.com/output/834343
Publisher URL http://dx.doi.org/10.1109/MWSYM.2015.7166838
Additional Information Title of Conference or Conference Proceedings : MTT

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