Sam Amiri
Multi-precision convolutional neural networks on heterogeneous hardware
Amiri, Sam; Hosseinabady, Mohamma; McIntosh-Smith, Simon; Nunez-Yanez, Jose
Authors
Mohamma Hosseinabady
Simon McIntosh-Smith
Jose Nunez-Yanez
Abstract
Fully binarised convolutional neural networks (CNNs) deliver very high inference performance using single-bit weights and activations, together with XNOR type operators for the kernel convolutions. Current research shows that full binarisation results in a degradation of accuracy and different approaches to tackle this issue are being investigated such as using more complex models as accuracy reduces. This paper proposes an alternative based on a multi-precision CNN frame-work that combines a binarised and a floating point CNN in a pipeline configuration deployed on heterogeneous hardware. The binarised CNN is mapped onto an FPGA device and used to perform inference over the whole input set while the floating point network is mapped onto a CPU device and performs re-inference only when the classification confidence level is low. A light-weight confidence mechanism enables a flexible trade-off between accuracy and throughput. To demonstrate the concept, we choose a Zynq 7020 device as the hardware target and show that the multi-precision network is able to increase the BNN accuracy from 78.5% to 82.5% and the CPU inference speed from 29.68 to 90.82 images/sec.
Presentation Conference Type | Conference Paper (published) |
---|---|
Conference Name | 2018 Design, Automation and Test in Europe Conference and Exhibition |
Start Date | Sep 11, 2018 |
Online Publication Date | Apr 23, 2018 |
Publication Date | Apr 23, 2018 |
Deposit Date | Dec 11, 2023 |
Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
Pages | 419-424 |
Book Title | 2018 Design, Automation & Test in Europe Conference & Exhibition |
ISBN | 9783981926316 |
DOI | https://doi.org/10.23919/DATE.2018.8342046 |
Public URL | https://uwe-repository.worktribe.com/output/11512159 |
You might also like
Dynamic energy management of FPGA accelerators in embedded systems
(2018)
Journal Article
Energy optimization in commercial FPGAs with voltage, frequency and logic scaling
(2015)
Journal Article
Simultaneous multiprocessing in a software-defined heterogeneous FPGA
(2018)
Journal Article
Pipelined streaming computation of histogram in FPGA OpenCL
(2018)
Presentation / Conference Contribution
Downloadable Citations
About UWE Bristol Research Repository
Administrator e-mail: repository@uwe.ac.uk
This application uses the following open-source libraries:
SheetJS Community Edition
Apache License Version 2.0 (http://www.apache.org/licenses/)
PDF.js
Apache License Version 2.0 (http://www.apache.org/licenses/)
Font Awesome
SIL OFL 1.1 (http://scripts.sil.org/OFL)
MIT License (http://opensource.org/licenses/mit-license.html)
CC BY 3.0 ( http://creativecommons.org/licenses/by/3.0/)
Powered by Worktribe © 2025
Advanced Search