Hardware architecture of the protein processing associative memory and the effects of dimensionality and quantisation on performance

Qadir, Omer; Lenz, Alex; Tempesti, Gianluca; Timmis, Jon; Pipe, Tony; Tyrrell, Andy

Abstract

The Protein Processor Associative Memory (PPAM) is a novel hardware architecture for a distributed, decentralised, robust and scalable, bidirectional, hetero-associative memory, that can adapt online to changes in the training data. The PPAM uses the location of data in memory to identify relationships and is therefore fundamentally different from traditional processing methods that tend to use arithmetic operations to perform computation. This paper presents the hardware architecture and details a sample digital logic implementation with an analysis of the implications of using existing techniques for such hardware architectures. It also presents the results of implementing the PPAM for a robotic application that involves learning the forward and inverse kinematics. The results show that, contrary to most other techniques, the PPAM benefits from higher dimensionality of data, and that quantisation intervals are crucial to the performance of the PPAM. © 2014 Springer Science+Business Media New York.

Citation

Pipe, T., Qadir, O., Lenz, A., Tempesti, G., Timmis, J., Pipe, A. G., & Tyrrell, A. (2014). Hardware architecture of the protein processing associative memory and the effects of dimensionality and quantisation on performance. Genetic Programming and Evolvable Machines, 15(3), 245-274. https://doi.org/10.1007/s10710-014-9217-1

• Journal Article Type: Article
• Acceptance Date: Apr 2, 2014
• Publication Date: Jan 1, 2014
• Journal: Genetic Programming and Evolvable Machines
• Print ISSN: 1389-2576
• Publisher: Springer (part of Springer Nature)
• Peer Reviewed: Peer Reviewed
• Volume: 15
• Issue: 3
• Pages: 245-274
• DOI: https://doi.org/10.1007/s10710-014-9217-1
• Keywords: protein processing, PPAM, FPGA associative memory, BERT2, inverse kinematics, dimensionality, quantisation, non-standard computation
• Public URL: https://uwe-repository.worktribe.com/output/826171
• Publisher URL: http://dx.doi.org/10.1007/s10710-014-9217-1