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Component-wise instruction-cache behavior prediction

Rakib, Abdur; Parshin, Oleg; Thesing, Stephan; Wilhelm, Reinhard

Authors

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Rakib Abdur Rakib.Abdur@uwe.ac.uk
Senior Lecturer in Mobile Security

Oleg Parshin

Stephan Thesing

Reinhard Wilhelm



Contributors

Farn Wang
Editor

Abstract

The precise determination of worst-case execution times (WCETs) for programs is mostly being performed on fully linked executables, since all needed information is available and all machine parameters influencing cache performance are available to the analysis. This paper describes how to perform a component-wise prediction of the instruction cache behavior guaranteeing conservative results compared to an analysis of a fully linked executable. This proves the correctness of the method based on a previous proof of correctness of the analysis of fully linked executables. The analysis is described for a general A-way set associative cache. The only assumption is that the replacement strategy is LRU. © Springer-Verlag 2004.

Citation

Rakib, A., Parshin, O., Thesing, S., & Wilhelm, R. (2004). Component-wise instruction-cache behavior prediction. In F. Wang (Ed.), https://doi.org/10.1007/978-3-540-30476-0_20

Conference Name International Symposium on Automated Technology for Verification and Analysis
Publication Date Oct 31, 2004
Deposit Date Jun 16, 2017
Publicly Available Date Mar 29, 2024
Volume 3299
Pages 211-229
Series Title Lecture Notes in Computer Science
Series ISSN 0302-9743
ISBN 9783540236108
DOI https://doi.org/10.1007/978-3-540-30476-0_20
Keywords WECT, cache analysis, LRU strategy
Public URL https://uwe-repository.worktribe.com/output/1057459
Publisher URL http://dx.doi.org/10.1007/978-3-540-30476-0_20
Related Public URLs https://link.springer.com/chapter/10.1007%2F978-3-540-30476-0_20