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Implementing spiking neural networks for real-time signal-processing and control applications: A model-validated FPGA approach

Pearson, Martin; Pipe, Anthony G.; Melhuish, Chris; Mitchinson, B.; Nibouche, Mokhtar; Gurney, K.; Gilhespy, I.

Authors

Chris Melhuish Chris.Melhuish@uwe.ac.uk
Professor of Robotics & Autonomous Systems

B. Mitchinson

K. Gurney

I. Gilhespy



Abstract

In this paper, we present two versions of a hardware processing architecture for modeling large networks of leaky-integrate-and-fire (LIF) neurons; the second version provides performance enhancing features relative to the first. Both versions of the architecture use fixed-point arithmetic and have been implemented using a single field-programmable gate array (FPGA). They have successfully simulated networks of over 1000 neurons configured using biologically plausible models of mammalian neural systems. The neuroprocessor has been designed to be employed primarily for use on mobile robotic vehicles, allowing bio-inspired neural processing models to be integrated directly into real-world control environments. When a neuroprocessor has been designed to act as part of the closed-loop system of a feedback controller, it is imperative to maintain strict real-time performance at all times, in order to maintain integrity of the control system. This resulted in the reevaluation of some of the architectural features of existing hardware for biologically plausible neural networks (NNs). In addition, we describe a development system for rapidly porting an underlying model (based on floating-point arithmetic) to the fixed-point representation of the FPGA-based neuroprocessor, thereby allowing validation of the hardware architecture. The developmental system environment facilitates the cooperation of computational neuroscientists and engineers working on embodied (robotic) systems with neural controllers, as demonstrated by our own experience on the Whiskerbot project, in which we developed models of the rodent whisker sensory system. © 2007 IEEE.

Citation

Pearson, M., Pipe, A. G., Mitchinson, B., Gurney, K., Melhuish, C., Gilhespy, I., & Nibouche, M. (2007). Implementing spiking neural networks for real-time signal-processing and control applications: A model-validated FPGA approach. IEEE Transactions on Neural Networks, 18(5), 1472-1487. https://doi.org/10.1109/TNN.2007.891203

Journal Article Type Article
Publication Date Sep 1, 2007
Journal IEEE Transactions on Neural Networks
Print ISSN 1045-9227
Publisher Institute of Electrical and Electronics Engineers
Peer Reviewed Peer Reviewed
Volume 18
Issue 5
Pages 1472-1487
DOI https://doi.org/10.1109/TNN.2007.891203
Keywords spiking neural networks, real-time signal-processing, model-validated FPGA approach
Public URL https://uwe-repository.worktribe.com/output/1025244
Publisher URL http://dx.doi.org/10.1109/TNN.2007.891203
Additional Information Additional Information : This article summarises the product of Martin Pearson's PhD, a novel real-time spiking neural network processor. Pipe is Director of Studies for that PhD. It was an important outcome of the EPSRC funded �Whiskerbot' project that completed in 2006